Publications

2026

  • Cut Topology-Based FPGA Logic Architecture with Powerful Logic Capacity and Area Efficiency. Xianfeng Cao, Jiangnan Li, Chenyu Jiang, Lingli Wang. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 2026

  • Timing Yield-Driven Clock Skew Scheduling Based on Hybrid Distributions. Kaixiang Zhu, Jiangnan Li, Lingli Wang and Wai-Shing Luk. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), May 2026

  • DataFlowGen: An MLIR-based Compiler for Efficient Dataflow Accelerator Generation. Jiangnan Li, Kaixiang Zhu, Zhengyi Zhang and Lingli Wang. The Chips to Systems Conference (DAC), July 2026

  • Dynamic-Cost Area Recovery for Fracturable LUT-Based FPGAs. Xianfeng Cao, Jiangnan Li and Lingli Wang. The Chips to Systems Conference (DAC), July 2026

  • A Collaborative Framework for Multi-Level Multi-Objective Design Space Exploration . Jiangnan Li=, Kaixiang Zhu=, Yuping Bai, Yunfei Dai, Qing He, Yu He, Lingli Wang. Design, Automation and Test in Europe Conference (DATE), April 2026

  • An End-to-End Compilation Flow with Reinforcement Learning-Guided Logic Synthesis. Jiangnan Li=, Kaixiang Zhu=, Qing He, Yu He, Lingli Wang. 2026 IEEE International Symposium on Circuits and Systems (ISCAS), May 2026

  • Novel Multi-Corner Delay Padding using Path Relationship Analysis and Dual Decomposition. Kaixiang Zhu, Jiangnan Li, Lingli Wang, Wai-Shing Luk. 31st Asia and South Pacific Design Automation Conference (ASP-DAC), January 2026

  • SP-VF: Subspace-Preserving Vector Fitting for Scalable Multi-Port S-Parameter Modeling. Zhengyi Zhang, Sijing Yang, Jiangnan Li, Lingli Wang. 2026 IEEE 35th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2026

2025

  • DynVec: An End-to-End Framework for Efficient Vector-Dataflow Execution. Jiangnan Li, Xianfeng Cao, Kaixiang Zhu, Wenbo Yin, Lingli Wang. 2025 International Conference on Computer-Aided Design (ICCAD), Munich, Germany, October 2025

  • GEF: A GNN-Based Evaluation Framework for FPGA Routing Architecture. Yuanqi Wang, Yunfei Dai, Jiangnan Li, Kaixiang Zhu, Huizhen Kuang, Hao Zhou, Eric Ren, Xifan Tang, Weijun Qin, Tao Li and Lingli Wang. the 35th International Conference on Field-Programmable Logic and Applications ( FPL), September 2025

2024

  • An MLIR-based Compiler for Hardware Acceleration with Recursion Support. Jiangnan Li, Zhengyi Zhang, Xuegong Zhou, Lingli Wang. 2024 International Conference on Field Programmable Technology (ICFPT), Sydney, December 2024

  • An End-to-End Agile Design Framework to Improve Energy Efficiency on CGRAs. Jiangnan Li=, Yazhou Yan=, Guowei Zhu, Wenbo Yin, Lingli Wang. 2024 IEEE 35th International Conference on Application-specific Systems, Architectures and Processors (ASAP), July 2024

  • MDCRA: A Reconfigurable Accelerator Framework for Multiple Dataflow Lanes. Shaoyang Sun, Boyin Jin, Jiahang Lou, Jiangnan Li, Yuhang Cao, Jingyuan Li, Chen Shen, Yuan Dai, Wenbo Yin, Wai-Shing Luk, Lingli Wang. 2024 IEEE 35th International Conference on Application-specific Systems, Architectures and Processors (ASAP), July 2024

  • An Architecture-Agnostic Dataflow Mapping Framework on CGRA. Jiangnan Li=, Yazhou Yan=, Jingyuan Li, Shaoyang Sun, Boyin Jin, Wenbo Yin, Lingli Wang. 2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), San Francisco, CA, USA, May 2024

  • TransMap: An Efficient CGRA Mapping Framework via Transformer and Deep Reinforcement Learning. Jingyuan Li, Yuan Dai, Yihan Hu, Jiangnan Li, Wenbo Yin, Jun Tao, Lingli Wang, 2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), San Francisco, CA, USA, May 2024

  • HierCGRA: A Novel Framework for Large-scale CGRA with Hierarchical Modeling and Automated Design Space Exploration. Sichao Chen, Chang Cai, Su Zheng, Jiangnan Li, Guowei Zhu, Jingyuan Li, Yazhou Yan, Yuan Dai, Wenbo Yin, Lingli Wang. ACM Transactions on Reconfigurable Technology and Systems (TRETS), May 2024.

  • Data Flow Graph Partitioning Method for CGRA Temporal Mapping Based on Bayesian Optimization. Yihan Hu, Jiangnan Li, Wenbo Yin, Lingli Wang, Wai-Shing Luk, 2024 Conference of Science and Technology for Integrated Circuits(CSTIC), March 2022.

  • FDRA: A Framework for a Dynamically Reconfigurable Accelerator Supporting Multi-Level Parallelism. Yunhui Qiu, Yiqing Mao, Xuchen Gao, Sichao Chen, Jiangnan Li, Wenbo Yin, Lingli Wang. ACM Transactions on Reconfigurable Technology and Systems (TRETS), January 2024.

2023

  • GRAFT: GNN-based Adaptive Framework for Efficient CGRA Mapping. Jiangnan Li, Chang Cai, Yaya Zhao, Yazhou Yan, Wenbo Yin, Lingli Wang. 2023 International Conference on Field Programmable Technology (ICFPT), Yokohama, Japan, December 2023

2022

  • Ordermap: A cgra mapping algorithm based on dfg analysis and graph homomorphism. Jiangnan Li, Su Zheng, Lingli Wang, Wenbo Yin, 2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT), October 2022.